SmartStateIndia
News

STM32WL5x, The 1st Wireless MCU with Embedded Multi-Modulation LoRa Radio, Now With Dual Core

stm

ST recently launched the STM32WL5x, a dual-core version of the STM32WL, the first wireless MCU with an embedded multi-modulation radio (LoRa, (G)FSK, (G)MSK, BPSK). The new models offer a Cortex-M0+ and a Cortex-M4 core for greater flexibility and security. We also released an update to the STM32CubeWL MCU package that includes a Sigfox stack. Hence, engineers will be able to take advantage of the modulation schemes available and reduce their time to market. The increased polyvalence of the STM32WL series also opens the door to new applications for smart cities or smart agriculture, among others. Therefore, let’s look at the journey that would lead engineers and decision-makers to choose an STM32WL5x.

Prototyping Starts Here
The first challenge for most teams is the ability to come up with a proof-of-concept rapidly. Being able to demonstrate how to use these two cores will be crucial when convincing managers. Hence, ST is launching its NUCLEO-WL55JC1, the first development board with an STM32WL55JC.

On the software side, the latest version of STM32CubeWL includes application examples for this new Nucleo board to hasten developments. For instance, we provide a reference template to help build software that takes advantage of the two cores. Additionally, STM32CubeMX received an update enabling the configuration of the LoRaWAN and Sigfox stacks straight from the utility. We also offer demonstration programs that can send sensor data to a gateway or “Concentrator.” Since seeing is believing, a demo application running on this Nucleo board is the fastest way to show why the dual-core version of the STM32WL brings greater flexibility and security to projects.

STM32WL5x: A Fully Open Dual-Core Architecture for Greater Flexibility

2 Cores to Avoid Re-Certification With Every Update
The first STM32WL that we launched in January 2020 has a single Cortex-M4 that runs everything. Engineers that don’t need to update their application frequently tend to prefer such architecture for its simplicity. However, some teams with more demanding constraints could have felt trapped. Let’s take the example of a product that needs frequent upgrades. If the network and applications stacks are on the same core, modifying the code means re-certifying the communication protocol. Thanks to the dual-core architecture of the STM32WL5x, developers sidestep this problem. Indeed, engineers can put the network stack on the Cortex-M0+ and run the application on the Cortex-M4. Hence, updating the latter doesn’t automatically trigger the need to re-certify the network stack.

2 Cores to Avoid Multiple Qualifications
Another challenge comes from the need to qualify components. A small startup working on an IoT project tends to prioritize the most straightforward approach. In this regard, the STM32WLE and its single-core architecture is a great answer. For instance, we recently saw an automated rubber collection system that used the MCU to send alerts to the cloud. This smart agriculture system used the STM32WLE and relied on LoRa to help farmers optimize their operations. The system is a popular and high-volume product because of the integrated nature of the microcontroller and its single-core architecture that made it easy to develop a proof-of-concept.

However, when a large corporation works on a myriad of projects and supports multiple protocols, using one device for all of them is a tremendous asset. Indeed, the need to qualify only one component means a greater return on investment and a faster time to market. With the STM32WL5x, teams can create an application for the Cortex-M4 and use a different sub-gigahertz protocol on the Cortex-M0+ to suit their needs. Furthermore, it enables them to test various protocols more easily.

STM32WL5xSTM32WL5x: A Cortex-M0+ for More Security

2 Reasons Behind our Dual-Core Architecture
ST decided to use the Cortex-M0+ for a myriad of reasons, but two particularly stand out. First of all, the dual-core approach offered similar performance and a more cost-effective structure for sub-gigahertz applications than the use of one larger core. Second of all, we understood the necessity of integrating a hardware platform geared toward security. The new STM32WL5x thus offers hardware isolation between each core as well as a key management service. The system stores and manages user application keys in a secure area for greater security. It also enables features like authenticity verification, strong data decryption, and data integrity monitoring. The dual-core STM32WL5x also comes with many of our STM32Trust features, such as secure firmware install and update. Additionally, it has two very useful unique IDs (64-bit and 96-bit) and it offers multiple protection levels against read and write operations.

2 Different Approaches to the Cortex-M0+
The response from ST’s customers has been both positive and creative, with some using the STM32WL in an unexpected fashion. Indeed, most systems use the Cortex-M0+ for their sub-gigahertz protocol and the Cortex-M4 for their application. However, thanks to the flexibility of our implementation, some ST partners did the exact opposite. Some companies chose to enjoy the security benefits of the Cortex-M0+ for their sensitive application layers. Their teams then put the radio stack on the Cortex-M4, thus releasing a more secure and cost-effective solution for their application. Engineers are always trying to adapt to new security demands while making their products more accessible. The new dual-core architecture of the STM32WL offers them a new tool to reach their objective.

https://blog.st.com/stm32wl5x/

Related posts

GajShield Infotech launches ‘Data Security Firewall’

SSI Bureau

Tenable discovers vulnerabilities in the Magento Mass Import plugin

SSI Bureau

IDEMIA’s facial recognition ranked #1 in NIST’s latest FRVT Test

SSI Bureau

Leave a Comment

This website uses cookies to improve your experience. We'll assume you're ok with this, but you can opt-out if you wish. Accept Read More